BEFORE flashing laptops make sure EC version is up to date (yes it's proprietary). (Link for fun: <https://notabug.org/libreboot/libreboot/issues/731>.. __Sorry for broken link!__)
-## Coreboot for T400 without blobs
-Here's our config for coreboot, copy it here to this path [coreboot/.config](t400_coreboot/).
-( Below in the text we refer to it as ~/coreboot_config_t400_8mb )
-
- #!/bin/bash -e
- #Building Coreboot without blobs for T400
- #Assumed 8MB rom (can use ./flashrom -p internal to see this on the proprietary T400)
- #If not 8MB just change size in menuconfig and take other .bin from ich9gen, no problem
-
-
- # See also https://www.coreboot.org/Build_HOWTO#debian
- apt update && apt upgrade -y
- apt-get install git build-essential gnat flex bison libncurses5-dev wget zlib1g-dev -y
-
- # CLONE
- git clone https://review.coreboot.org/coreboot
- cd coreboot
- git submodule update --init --checkout
-
- #You can copy our config and use it if you wish
- #cp coreboot_config_t400_8mb coreboot/.config
-
- # CONFIGURE
- # In this menu config set wanted settings (see our config, or the guide for T400 by zerocat http://www.zerocat.org/projects/coreboot-machines/doc/generated-documentation/html/md_doc_build-coreboot-t400.html)
- # Our final conf is in ~/coreboot_config_t400_8mb
- # NOTE: we add descriptor for gbit ethernet later (NO need for "add Intel descriptor.bin file")
- make menuconfig #or make nconfig
-
- # BUILD toolchain
- make crossgcc-x64 CPUS=2
- #or make crossgcc CPUS=2 #for all architectures
-
- # BUILD rom
- make
- cp build/coreboot.rom ~/t400_8mb_coreboot_notReady.rom
-
-
- # DESCRIPTOR
- # We add the gbit ethernet descriptor with the tool provided by libreboot
- git clone https://notabug.org/libreboot/libreboot
- cd libreboot
- ./oldbuild module ich9deblob
- cd resources/utilities/ich9deblob/
-
- #NOTE: SET YOUROWN MAC HERE! Should be unique, just take the one which is under the T400
- ./ich9gen --mac-address 00:24:7E:AA:AA:AA
-
- cp ~/t400_8mb_coreboot_notReady.rom ~/t400_8mb_coreboot_flashable.rom
- dd if=ich9fdgbe_8m.bin of=t400_8mb_coreboot_flashable.rom bs=12k count=1 conv=notrunc
-
- exit
-
- # ROM IS READY!
- # NEXT STEPS ARE DONE ON EXTERNAL DEVICE (we used BeagleBoneBlack)
- # See libreboot for external flash, just disassemble laptops (can take a few hours) -> https://libreboot.org/docs/install/t400_external.html
- # Flash with for example BBB: https://libreboot.org/docs/install/bbb_setup.html
- # (Probably you want to power the BBB with 5V mini-usb or power adapter and connect everything to it. However, when we flashed we connected BBB (connector called SYS_5V) to 5V on regular ATX PSU, and the chip gets 3.3V directly from the PSU, and ground from BBB)
-
- ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom
- ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=1024 -r factory2.rom
- ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=1024 -r factory3.rom
- ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=256 -r factory4.rom
- ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r factory5.rom
- sha256sum factory*.rom #a majority should match, or at least 2 should have the same hash
-
- ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w ~/t400_8mb_coreboot_flashable.rom
- #Should say "Verified". If you're paranoid you could read it again and check hash.
-
-## Coreboot for X230
-
-Make sure bios has latest EC version. We had EC 1.14 (G2HT35WW), this should be the latest (citation needed).
-
-### Internally
-
-Due to security weakness in older versions of the proprietary BIOS, it is now possible to flash internally.
-This is the recommended procedure for X230.
-
-See: <https://doc.coreboot.org/mainboard/lenovo/ivb_internal_flashing.html?highlight=x230>
-
-### Externally (not recommended)
-
-#### Warning
-
-As we flashed externally, we were not careful enough, and accidentally lost a resistor. This is certainly a risk when flashing by this method, the same issue as described here
-<https://www.reddit.com/r/coreboot/comments/dhwdss/did_i_just_brick_my_x230/fmytpm0/?utm_source=reddit&utm_medium=web2x&context=3> (supposedly a R1378, SMD 33.2Ω resistor). With open circuit here computer cannot boot, however by adding it back or by shorting it it will be able to boot (after booting, the computer can run with an open circuit here ... seemingly).
-
-#### Instructions
-
-After asking on IRC the recommendation was to, on the signal lines, add a resistor e.g. 47 Ohm... presumably for both data lines and clock?
-
-See (POSSIBLY OUTDATED LINKS):
-
-
-<https://doc.coreboot.org/mainboard/lenovo/Ivy_Bridge_series.html> (OLD: http://www.coreboot.org/Board:lenovo/x230#Flashing)
-(additionally: <https://www.chucknemeth.com/laptop/lenovo-x230/flash-lenovo-x230-coreboot> and <https://github.com/0xbb/coreboot-x230>)
-
-Recommendation: instead of supplying 3.3V externally, connect power and ethernet to computer to get WakeOnLan (might need to enable in BIOS). Thereby the chip will get powered with reduced risk.
-
-Warning: Be careful not to break off the resistors close to the chips as these are very brittle! (as mentioned before)
-
-Connect to Pomona holder (8pin) like below if BeagleBone Black is used: (see links above for Raspberry Pi 3)
-
- 1 DI (IO0) -> 18
- 2 CLK -> 22 SPIO_SCLK
- 3 NC
- 4 VCC -> 3 or 4 (3.3V)
-
- 8 GND -> 1 or 2 (GND)
- 7 NC
- 6 DO (IO1) -> 21 SPIO_DO
- 5 CS -> 17 SPIO_CSO
-
-Both chips should have the same layout. Read from both chips SPI2 (4MB) and SPI1 (8MB), save these images a number of times and make sure they seem to be correctly read from chip (i.e. verify hashsum). In my case the below command was used according to the id on the second row of the chips, together with the recommendation flashrom gives when no -c flag is used. Possible to try different speeds, 2048 worked well. For this ethernet was not connect or any other power to the laptop, from our efforts 3.3V external power needed to be provided to the chip on pin 4 instead.
-
- #Top chip
- ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r x230_spi2_0.rom -c "MX25L3206E/MX25L3208E"
-
- #Bottom chip
- ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r x230_spi1_0.rom -c "MX25L6406E/MX25L6408E"
-
-
-To be continued ...
-
-
## GRUB
### Boot manually
For some setups the default GRUB script does not work. Either try updating the grub.cfg (next section) or boot manually (below).
## LASTLY FLASH TO CHIP (here internally)
#sudo ./flashrom/flashrom -p internal -w x200.rom
-
-### X200
+
#### Flashing Internally
-To internally flash your ROM use the kernel parameter "iomem=relaxed". Thus, if you boot manually you would enter e g "linux=vmlinuz.. iomem=relaxed".
-Get a newer version of flashrom than in Debian repo. In my case the older version did not detect the exact chip on x200, which was fixed by getting most recent version
+To internally flash your ROM (on Coreboot or Libreboot) use the kernel parameter "iomem=relaxed". Thus, if you boot manually you would enter e g "linux=vmlinuz.. iomem=relaxed".
+
+Get a newer version of flashrom than in Debian repo. In my case the older version did not detect the exact chip on x200, which was fixed by getting most recent version.
-Note these tools are built and ready [at](https://www.mirrorservice.org/sites/libreboot.org/release/stable/20160907/libreboot_r20160907_util.tar.xz) or similar
+Note these tools are built and ready [at](https://www.mirrorservice.org/sites/libreboot.org/release/stable/20160907/libreboot_r20160907_util.tar.xz) or similar.
#backup current rom
- sudo ./flashrom -p internal -r libreboot.rom
+ sudo ./flashrom -p internal -r libreboot.rom
#Optional: remove old GRUB (test) config
./cbfstool libreboot.rom remove -n grubtest.cfg
#Optional: get the new GRUB (test) config into your ROM
- ./cbfstool libreboot.rom add -n grubtest.cfg -f grubtest.cfg -t raw
+ ./cbfstool libreboot.rom add -n grubtest.cfg -f grubtest.cfg -t raw
#Optional: change background in GRUB menu (dest must be called background.png /jpg)
#./cbfstool yourrom.rom remove background.png -n background.png
sudo ./flashrom -p internal -w libreboot.rom #updated image
-### KGPE-D16
+## Extend 2MB ROM to 8MB
+
+### Here is the script we use to flash 8mb chip
+
+```
+root@beaglebone:~# cat flashme_8mb.sh
+echo 'Creating a 8mb Libreboot Rom'
+echo 'creating the file /home/flashing_d16/libreSept16/8mb_free.rom'
+echo 'dd ing'
+touch /home/flashing_d16/libreSept16/8mb_free.rom
+echo ' ' > /home/flashing_d16/libreSept16/8mb_free.rom
+echo 'Zeros then image'
+dd if=/dev/zero bs=6144k count=1 of=/home/flashing_d16/libreSept16/8mb_free.rom
+echo 'Writing image'
+dd if=/home/flashing_d16/libreSept16/libreboot_r20160907_grub_kgpe-d16/kgpe-d16_svenska_txtmode.rom >> /home/flashing_d16/libreSept16/8mb_free.rom
+ls -lah /home/flashing_d16/libreSept16/8mb_free.rom
+echo 'Its flashing time'
+/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -w /home/flashing_d16/libreSept16/8mb_free.rom
+echo 'everything is done'
+echo 'plz verify'
+echo '
+cd directory-with-size
+/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom
+/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom
+/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom
+/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=1024 -r factory3.rom
+/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=1024 -r factory4.rom
+/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=1024 -r factory5.rom
+/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=256 -r factory6.rom
+/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=256 -r factory7.rom
+/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=256 -r factory8.rom
+/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r factory9.rom
+/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r factory10.rom
+/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r factory11.rom
+sha512sum factory*.rom
+'
-#### Summary, using this free computer as a workstation
+```
+
+## T400 without blobs (Coreboot)
+Here's our config for coreboot, copy it here to this path [coreboot/.config](t400_coreboot/).
+( Below in the text we refer to it as ~/coreboot_config_t400_8mb )
+
+ #!/bin/bash -e
+ #Building Coreboot without blobs for T400
+ #Assumed 8MB rom (can use ./flashrom -p internal to see this on the proprietary T400)
+ #If not 8MB just change size in menuconfig and take other .bin from ich9gen, no problem
+
+
+ # See also https://www.coreboot.org/Build_HOWTO#debian
+ apt update && apt upgrade -y
+ apt-get install git build-essential gnat flex bison libncurses5-dev wget zlib1g-dev -y
+
+ # CLONE
+ git clone https://review.coreboot.org/coreboot
+ cd coreboot
+ git submodule update --init --checkout
+
+ #You can copy our config and use it if you wish
+ #cp coreboot_config_t400_8mb coreboot/.config
+
+ # CONFIGURE
+ # In this menu config set wanted settings (see our config, or the guide for T400 by zerocat http://www.zerocat.org/projects/coreboot-machines/doc/generated-documentation/html/md_doc_build-coreboot-t400.html)
+ # Our final conf is in ~/coreboot_config_t400_8mb
+ # NOTE: we add descriptor for gbit ethernet later (NO need for "add Intel descriptor.bin file")
+ make menuconfig #or make nconfig
+
+ # BUILD toolchain
+ make crossgcc-x64 CPUS=2
+ #or make crossgcc CPUS=2 #for all architectures
+
+ # BUILD rom
+ make
+ cp build/coreboot.rom ~/t400_8mb_coreboot_notReady.rom
+
+
+ # DESCRIPTOR
+ # We add the gbit ethernet descriptor with the tool provided by libreboot
+ git clone https://notabug.org/libreboot/libreboot
+ cd libreboot
+ ./oldbuild module ich9deblob
+ cd resources/utilities/ich9deblob/
+
+ #NOTE: SET YOUROWN MAC HERE! Should be unique, just take the one which is under the T400
+ ./ich9gen --mac-address 00:24:7E:AA:AA:AA
+
+ cp ~/t400_8mb_coreboot_notReady.rom ~/t400_8mb_coreboot_flashable.rom
+ dd if=ich9fdgbe_8m.bin of=t400_8mb_coreboot_flashable.rom bs=12k count=1 conv=notrunc
+
+ exit
+
+ # ROM IS READY!
+ # NEXT STEPS ARE DONE ON EXTERNAL DEVICE (we used BeagleBoneBlack)
+ # See libreboot for external flash, just disassemble laptops (can take a few hours) -> https://libreboot.org/docs/install/t400_external.html
+ # Flash with for example BBB: https://libreboot.org/docs/install/bbb_setup.html
+ # (Probably you want to power the BBB with 5V mini-usb or power adapter and connect everything to it. However, when we flashed we connected BBB (connector called SYS_5V) to 5V on regular ATX PSU, and the chip gets 3.3V directly from the PSU, and ground from BBB)
+
+ ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom
+ ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=1024 -r factory2.rom
+ ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=1024 -r factory3.rom
+ ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=256 -r factory4.rom
+ ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r factory5.rom
+ sha256sum factory*.rom #a majority should match, or at least 2 should have the same hash
+
+ ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w ~/t400_8mb_coreboot_flashable.rom
+ #Should say "Verified". If you're paranoid you could read it again and check hash.
+
+## X230 (Coreboot)
+
+Make sure bios has latest EC version. We had EC 1.14 (G2HT35WW), this should be the latest (citation needed).
+
+### Internally
+
+Due to security weakness in older versions of the proprietary BIOS, it is now possible to flash internally.
+This is the recommended procedure for X230.
+
+See: <https://doc.coreboot.org/mainboard/lenovo/ivb_internal_flashing.html?highlight=x230>
+
+### Externally (not recommended)
+
+#### Warning
+
+As we flashed externally, we were not careful enough, and accidentally lost a resistor. This is certainly a risk when flashing by this method, the same issue as described here
+<https://www.reddit.com/r/coreboot/comments/dhwdss/did_i_just_brick_my_x230/fmytpm0/?utm_source=reddit&utm_medium=web2x&context=3> (supposedly a R1378, SMD 33.2Ω resistor). With open circuit here computer cannot boot, however by adding it back or by shorting it it will be able to boot (after booting, the computer can run with an open circuit here ... seemingly).
+
+#### Instructions
+
+After asking on IRC the recommendation was to, on the signal lines, add a resistor e.g. 47 Ohm... presumably for both data lines and clock?
+
+See (POSSIBLY OUTDATED LINKS):
+
+
+<https://doc.coreboot.org/mainboard/lenovo/Ivy_Bridge_series.html> (OLD: http://www.coreboot.org/Board:lenovo/x230#Flashing)
+(additionally: <https://www.chucknemeth.com/laptop/lenovo-x230/flash-lenovo-x230-coreboot> and <https://github.com/0xbb/coreboot-x230>)
+
+Recommendation: instead of supplying 3.3V externally, connect power and ethernet to computer to get WakeOnLan (might need to enable in BIOS). Thereby the chip will get powered with reduced risk.
+
+Warning: Be careful not to break off the resistors close to the chips as these are very brittle! (as mentioned before)
+
+Connect to Pomona holder (8pin) like below if BeagleBone Black is used: (see links above for Raspberry Pi 3)
+
+ 1 DI (IO0) -> 18
+ 2 CLK -> 22 SPIO_SCLK
+ 3 NC
+ 4 VCC -> 3 or 4 (3.3V)
+
+ 8 GND -> 1 or 2 (GND)
+ 7 NC
+ 6 DO (IO1) -> 21 SPIO_DO
+ 5 CS -> 17 SPIO_CSO
+
+Both chips should have the same layout. Read from both chips SPI2 (4MB) and SPI1 (8MB), save these images a number of times and make sure they seem to be correctly read from chip (i.e. verify hashsum). In my case the below command was used according to the id on the second row of the chips, together with the recommendation flashrom gives when no -c flag is used. Possible to try different speeds, 2048 worked well. For this ethernet was not connect or any other power to the laptop, from our efforts 3.3V external power needed to be provided to the chip on pin 4 instead.
+
+ #Top chip
+ ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r x230_spi2_0.rom -c "MX25L3206E/MX25L3208E"
+
+ #Bottom chip
+ ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r x230_spi1_0.rom -c "MX25L6406E/MX25L6408E"
+
+
+To be continued ...
+
+
+## KGPE-D16 (Libreboot)
+
+### Summary, using this free computer as a workstation
Once you have flashed and found working memory for the system. It works rather well, no need to remove CMOS battery for instance (if no picture/boot, just disconnect PSU for a sec and restart).
Small annoyance is that the computer won't start with USB _storage_ attached (so instead, you should disconnect these and reconnect when grub is shown).
It is a good machine for every day use (free firmware & 32 cores and 64GB DDR3 ECC RAM), and possible to find used starting at 5k = 3k+1k+1k (motherboard+cpu&cooler+ram), remember that external GPU and sound cards will be needed.
The single-thread performance is rubbish and a major bottleneck for certain applications (no you can't play CS:GO or other modern video games, and only slight performance gain can be achieved by forcing all threads to highest clock in Linux with cpupower). The other downside is that the dual CPU system draws ~200 watts IN IDLE (and 400w at full load).
-#### General
+### General
Also Raptor Engineering was working on new free features (OpenBMC, IPMI, and Thermal management drivers) for this board, [here](https://www.raptorengineering.com/coreboot/kgpe-d16-bmc-port-status.php).
* Note: It is necessary to have a dedicated sound card and graphics card, _if_ those features are desired.
-#### Using
+### Using
* Both GRUB and SeaBIOS work. But SeaBIOS has worked better when booting from CD-ROM or USB.
* If problems booting, disconnect power and remove CMOS battery for a couple of seconds.
* The default script in GRUB does not work with encrypted boot-partition (can manually boot).
* When booting from GRUB, you might want to use "load config from external device" instead of "boot USB". Recommended when booting LiveCDs etc., if you don't have any particular configuration locally.
-#### Quirks SeaBIOS stable
+### Quirks SeaBIOS stable
* With the stable release and SeaBIOS, most is working well but there is still one issue with USB devices at boot.
**Example:** A USB stick is connected at the back of the moderboard when the computer boots.
Suddenly, USB ports does not work, such as the chassi's USB hub which is connected on the moderboard.
These are completely dead and the peripheral devices does not light up. Only rebooting does not help.
**Solution**, turn off computer and disconnect power (we did not need to clear CMOS), and disconnect the problematic USB stick on the back. Turn on power. The USB stick can now be plugged in when the hardware has been initialized and GRUB is shown.
-#### Quirks with earlier GRUB version
+### Quirks with earlier GRUB version
* Sometimes we get an error when booting, this is resolved by disconnecting USD devices such as keyboard and mouse until the hardware is initiated.
* In GRUB the USB keyboard is sometimes unusably slow. Fix: always have a PS/2 keyboard connected, but use the USB keyboard.
* In some configurations the fans will always be low and the system fail to boot, which would also overheat the already stuck system (!), thus you might want to power the fans with PSU instead of board.
-#### Debugging
+### Debugging
* If you can't boot: reset CMOS (battery and power), make sure your graphic output correctly set (jumper on board). Otherwise, it is most likely a memory, CPU or ROM-image problem. Try to boot with as little RAM as possible or other memory brand, make sure the CPU is properly seated, verify ROM image on chip (e.g. check hashsum) - we have had all these problems. Finally, you can use a serial cable to debug and get an idea about the issue, and ask in Libreboot IRC.
-#### Our Tested Systems
+### Our Tested Systems
-##### A
+#### A
Debian Buster
Sound card (not fully free!)
-##### B
+#### B
Debian Stretch
4x 4GB 1333Mhz Reg-ECC HMT151R7BFR4C-H9
-#### Pics: The systems (old)
+### Pics: The systems (old)
[Div pics a](resources/div_pics/d16_a.jpg), [Div pics b](resources/div_pics/d16_b.jpg), [Div pics c](resources/div_pics/d16_c.jpg), [Div pics d](resources/div_pics/d16_d.jpg), [Div pics e](resources/div_pics/d16_e.jpg),
-#### Pics: Flashing (Don't use ATX PSU and do not solder like this, just for reference!)
+### Pics: Flashing (Don't use ATX PSU and do not solder like this, just for reference!)
[PLEASE JUST POMONA HOLDER INSTEAD but should be correctly connected 1](resources/fail_flash_1.png)
[pic 4](resources/div_pics/d16_f.jpg)
-#### Manuals for flashing
+### Manuals for flashing
[D16-chip](resources/d16_chip.png)
[Beagleboard Black P9 connector](resources/BBB_P9.png)
-#### Flashing Instructions
+### Flashing Instructions
Buy a couple of flash chips in case of you breaking them, and to test different payloads. Furthermore, one could buy a proprietary chip just to debug the hardware.
# Thus, it is possible to write to the ROM and read (e.g.) 10 times and compare the resulting `sha512sum` to that of the ROM downloaded from Libreboot.
# If the sum EXACTLY matches atleast once, it is reasonable to assume that the write indeed succeeded (we believe).
-## Extend 2MB ROM to 8MB
-
-### Here is the script we use to flash 8mb chip
-
-```
-root@beaglebone:~# cat flashme_8mb.sh
-echo 'Creating a 8mb Libreboot Rom'
-echo 'creating the file /home/flashing_d16/libreSept16/8mb_free.rom'
-echo 'dd ing'
-touch /home/flashing_d16/libreSept16/8mb_free.rom
-echo ' ' > /home/flashing_d16/libreSept16/8mb_free.rom
-echo 'Zeros then image'
-dd if=/dev/zero bs=6144k count=1 of=/home/flashing_d16/libreSept16/8mb_free.rom
-echo 'Writing image'
-dd if=/home/flashing_d16/libreSept16/libreboot_r20160907_grub_kgpe-d16/kgpe-d16_svenska_txtmode.rom >> /home/flashing_d16/libreSept16/8mb_free.rom
-ls -lah /home/flashing_d16/libreSept16/8mb_free.rom
-echo 'Its flashing time'
-/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -w /home/flashing_d16/libreSept16/8mb_free.rom
-echo 'everything is done'
-echo 'plz verify'
-echo '
-cd directory-with-size
-/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom
-/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom
-/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom
-/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=1024 -r factory3.rom
-/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=1024 -r factory4.rom
-/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=1024 -r factory5.rom
-/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=256 -r factory6.rom
-/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=256 -r factory7.rom
-/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=256 -r factory8.rom
-/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r factory9.rom
-/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r factory10.rom
-/home/flashing_d16/libreSept16/libreboot_r20160907_util/flashrom/armv7l/flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r factory11.rom
-sha512sum factory*.rom
-'
-
-```
-## Coreboot
## Free Wifi
projects / inbyggd-frihet-wiki.git / commitdiff