See:
<http://www.coreboot.org/Board:lenovo/x230#Flashing>
-<https://www.chucknemeth.com/laptop/lenovo-x230/flash-lenovo-x230-coreboot> or <https://github.com/0xbb/coreboot-x230>
+(additionally: <https://www.chucknemeth.com/laptop/lenovo-x230/flash-lenovo-x230-coreboot> and <https://github.com/0xbb/coreboot-x230>)
-Connect to pomona holder (8pin) like below if BeagleBone Black is used: (see links above for rasberry pi 3)
+Connect to pomona holder (8pin) like below if BeagleBone Black is used: (see links above for Raspberry Pi 3)
1 DI (IO0) -> 18
2 CLK -> 22 SPIO_SCLK
6 DO (IO1) -> 21 SPIO_DO
5 CS -> 17 SPIO_CSO
-Both chips should have the same layout. Read from both chips SPI2 (4MB) and SPI1 (8MB), save these images a number of times and make sure they seem to be correctly read from chip (i.e. verify hashsum). In my case the below command was used according to the id on the second row of the chips, together with the recommendation flashrom gives when no -c flag is used. Can try different speeds, 2048 worked well.
+Both chips should have the same layout. Read from both chips SPI2 (4MB) and SPI1 (8MB), save these images a number of times and make sure they seem to be correctly read from chip (i.e. verify hashsum). In my case the below command was used according to the id on the second row of the chips, together with the recommendation flashrom gives when no -c flag is used. Can try different speeds, 2048 worked well. For this ethernet was not connect or any other power to the laptop, from our efforts 3.3V external power needed to be provided to the chip on pin 4 instead.
#Top chip
./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r x230_spi2_0.rom -c "MX25L3206E/MX25L3208E"