Clarificatons X230

diff --git a/guider.mdwn b/guider.mdwn
index 5286ede24f02ee92c550050aae73d591e0a2eb77..694da9fa6cf7ead3b03a33b28b058932395301bf 100644 (file)
--- a/guider.mdwn
+++ b/guider.mdwn
@@ -78,17 +78,23 @@ Here's our config for coreboot, copy it here to this path [coreboot/.config](t40
 
 Make sure bios has latest EC version. We had EC 1.14 (G2HT35WW), this should be the latest (citation needed).
 
-
 ### Internally
 
-After doing more research we realized that there is a way to flash internally from the get-go.
+Due to security weakness in older versions of the proprietary BIOS, it is now possible to flash internally.
+This is the recommended procedure for X230.
+
 See: <https://doc.coreboot.org/mainboard/lenovo/ivb_internal_flashing.html?highlight=x230>
 
-### Externally
+### Externally (not recommended)
+
+#### Warning 
+
+As we flashed externally, we were not careful enough, and accidentally lost a resistor. This is certainly a risk when flashing by this method, the same issue as described here
+<https://www.reddit.com/r/coreboot/comments/dhwdss/did_i_just_brick_my_x230/fmytpm0/?utm_source=reddit&utm_medium=web2x&context=3> (supposedly a R1378, SMD 33.2Ω resistor). With open circuit here computer cannot boot, however by adding it back or by shorting it it will be able to boot (after booting, the computer can run with an open circuit here ... seemingly).
+
+#### Instructions
 
-Warning, we tried this method and accidentally lost a resistor same as
-<https://www.reddit.com/r/coreboot/comments/dhwdss/did_i_just_brick_my_x230/fmytpm0/?utm_source=reddit&utm_medium=web2x&context=3> (supposedly a R1378, SMD 33.2Ω resistor). With open circuit here computer cannot boot, however by adding it back or by shorting it it will be able to boot (after booting the computer can run with an open circuit here, but do not recommend).
-Additionally, after asking on IRC the recommendation was to, on the signal lines, add a resistor e.g. 47 Ohm... presumably for both data lines and clock? Or just flash internally...
+After asking on IRC the recommendation was to, on the signal lines, add a resistor e.g. 47 Ohm... presumably for both data lines and clock?
 
 See (POSSIBLY OUTDATED LINKS):
 
@@ -98,7 +104,7 @@ See (POSSIBLY OUTDATED LINKS):
 
 Recommendation: instead of supplying 3.3V externally, connect power and ethernet to computer to get WakeOnLan (might need to enable in BIOS). Thereby the chip will get powered with reduced risk. 
 
-Warning: Be careful not to break off the resistors close to the chips as these are very brittle!
+Warning: Be careful not to break off the resistors close to the chips as these are very brittle! (as mentioned before)
 
 Connect to Pomona holder (8pin) like below if BeagleBone Black is used: (see links above for Raspberry Pi 3)
 
@@ -112,7 +118,7 @@ Connect to Pomona holder (8pin) like below if BeagleBone Black is used: (see lin
     6 DO  (IO1)   -> 21 SPIO_DO
     5 CS          -> 17 SPIO_CSO
 
-Both chips should have the same layout. Read from both chips SPI2 (4MB) and SPI1 (8MB), save these images a number of times and make sure they seem to be correctly read from chip (i.e. verify hashsum). In my case the below command was used according to the id on the second row of the chips, together with the recommendation flashrom gives when no -c flag is used. Can try different speeds, 2048 worked well. For this ethernet was not connect or any other power to the laptop, from our efforts 3.3V external power needed to be provided to the chip on pin 4 instead.
+Both chips should have the same layout. Read from both chips SPI2 (4MB) and SPI1 (8MB), save these images a number of times and make sure they seem to be correctly read from chip (i.e. verify hashsum). In my case the below command was used according to the id on the second row of the chips, together with the recommendation flashrom gives when no -c flag is used. Possible to try different speeds, 2048 worked well. For this ethernet was not connect or any other power to the laptop, from our efforts 3.3V external power needed to be provided to the chip on pin 4 instead.
 
     #Top chip
     ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=2048 -r x230_spi2_0.rom -c "MX25L3206E/MX25L3208E"